Embedded Dynamic Random Access Memory (DRAM) typically employs Metal-Insulator-Metal (MIM) capacitors for data storage. These MIM capacitors have large aspect ratio cylindrical shapes that require placement in an integrated circuit metal stack. In current applications, a configuration of an embedded DRAM cell employs an MIM capacitor located under a bit line serving the embedded DRAM cell. This MIM capacitor arrangement is usually referred to as Capacitor-Under-Bitline (CUB). To accommodate this arrangement, the first metallization level in the integrated circuit has to be raised higher forcing contacts to be extended. Associated circuits typically operate more slowly employing this embedded DRAM process due to higher contact to contact parasitic capacitance. Improvement in this area would be beneficial to the art.